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- #ifndef NRF_SPI_H__
- #define NRF_SPI_H__
- #include <nrfx.h>
- #ifdef __cplusplus
- extern "C" {
- #endif
- #define NRF_SPI_PIN_NOT_CONNECTED 0xFFFFFFFF
- typedef enum
- {
- NRF_SPI_EVENT_READY = offsetof(NRF_SPI_Type, EVENTS_READY)
- } nrf_spi_event_t;
- typedef enum
- {
- NRF_SPI_INT_READY_MASK = SPI_INTENSET_READY_Msk,
- NRF_SPI_ALL_INTS_MASK = SPI_INTENSET_READY_Msk
- } nrf_spi_int_mask_t;
- typedef enum
- {
- NRF_SPI_FREQ_125K = SPI_FREQUENCY_FREQUENCY_K125,
- NRF_SPI_FREQ_250K = SPI_FREQUENCY_FREQUENCY_K250,
- NRF_SPI_FREQ_500K = SPI_FREQUENCY_FREQUENCY_K500,
- NRF_SPI_FREQ_1M = SPI_FREQUENCY_FREQUENCY_M1,
- NRF_SPI_FREQ_2M = SPI_FREQUENCY_FREQUENCY_M2,
- NRF_SPI_FREQ_4M = SPI_FREQUENCY_FREQUENCY_M4,
-
-
- NRF_SPI_FREQ_8M = (int)SPI_FREQUENCY_FREQUENCY_M8
- } nrf_spi_frequency_t;
- typedef enum
- {
- NRF_SPI_MODE_0,
- NRF_SPI_MODE_1,
- NRF_SPI_MODE_2,
- NRF_SPI_MODE_3
- } nrf_spi_mode_t;
- typedef enum
- {
- NRF_SPI_BIT_ORDER_MSB_FIRST = SPI_CONFIG_ORDER_MsbFirst,
- NRF_SPI_BIT_ORDER_LSB_FIRST = SPI_CONFIG_ORDER_LsbFirst
- } nrf_spi_bit_order_t;
- __STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
- nrf_spi_event_t event);
- __STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
- nrf_spi_event_t event);
- __STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
- nrf_spi_event_t event);
- __STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg,
- uint32_t mask);
- __STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg,
- uint32_t mask);
- __STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
- nrf_spi_int_mask_t spi_int);
- __STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg);
- __STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg);
- __STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg,
- uint32_t sck_pin,
- uint32_t mosi_pin,
- uint32_t miso_pin);
- __STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data);
- __STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg);
- __STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
- nrf_spi_frequency_t frequency);
- __STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
- nrf_spi_mode_t spi_mode,
- nrf_spi_bit_order_t spi_bit_order);
- #ifndef SUPPRESS_INLINE_IMPLEMENTATION
- __STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
- nrf_spi_event_t event)
- {
- *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
- #if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
- (void)dummy;
- #endif
- }
- __STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
- nrf_spi_event_t event)
- {
- return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
- }
- __STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
- nrf_spi_event_t event)
- {
- return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
- }
- __STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg,
- uint32_t mask)
- {
- p_reg->INTENSET = mask;
- }
- __STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg,
- uint32_t mask)
- {
- p_reg->INTENCLR = mask;
- }
- __STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
- nrf_spi_int_mask_t spi_int)
- {
- return (bool)(p_reg->INTENSET & spi_int);
- }
- __STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg)
- {
- p_reg->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos);
- }
- __STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg)
- {
- p_reg->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
- }
- __STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg,
- uint32_t sck_pin,
- uint32_t mosi_pin,
- uint32_t miso_pin)
- {
- #if defined(SPI_PSEL_SCK_CONNECT_Pos)
- p_reg->PSEL.SCK = sck_pin;
- #else
- p_reg->PSELSCK = sck_pin;
- #endif
- #if defined(SPI_PSEL_MOSI_CONNECT_Pos)
- p_reg->PSEL.MOSI = mosi_pin;
- #else
- p_reg->PSELMOSI = mosi_pin;
- #endif
- #if defined(SPI_PSEL_MISO_CONNECT_Pos)
- p_reg->PSEL.MISO = miso_pin;
- #else
- p_reg->PSELMISO = miso_pin;
- #endif
- }
- __STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data)
- {
- p_reg->TXD = data;
- }
- __STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg)
- {
- return p_reg->RXD;
- }
- __STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
- nrf_spi_frequency_t frequency)
- {
- p_reg->FREQUENCY = frequency;
- }
- __STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
- nrf_spi_mode_t spi_mode,
- nrf_spi_bit_order_t spi_bit_order)
- {
- uint32_t config = (spi_bit_order == NRF_SPI_BIT_ORDER_MSB_FIRST ?
- SPI_CONFIG_ORDER_MsbFirst : SPI_CONFIG_ORDER_LsbFirst);
- switch (spi_mode)
- {
- default:
- case NRF_SPI_MODE_0:
- config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) |
- (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
- break;
- case NRF_SPI_MODE_1:
- config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) |
- (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
- break;
- case NRF_SPI_MODE_2:
- config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) |
- (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
- break;
- case NRF_SPI_MODE_3:
- config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) |
- (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
- break;
- }
- p_reg->CONFIG = config;
- }
- #endif
- #ifdef __cplusplus
- }
- #endif
- #endif
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