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- #ifndef _NRF9160_PERIPHERALS_H
- #define _NRF9160_PERIPHERALS_H
- #define UICR_KEYSLOT_COUNT 128
- #define CLOCK_PRESENT
- #define CLOCK_COUNT 1
- #define POWER_PRESENT
- #define POWER_COUNT 1
- #define NVMC_PRESENT
- #define NVMC_COUNT 1
- #define NVMC_FEATURE_CACHE_PRESENT
- #define GPIO_PRESENT
- #define GPIO_COUNT 1
- #define P0_PIN_NUM 32
- #define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL
- #define DPPI_PRESENT
- #define DPPI_COUNT 1
- #define DPPI_CH_NUM 16
- #define DPPI_GROUP_NUM 6
- #define EGU_PRESENT
- #define EGU_COUNT 6
- #define EGU0_CH_NUM 16
- #define EGU1_CH_NUM 16
- #define EGU2_CH_NUM 16
- #define EGU3_CH_NUM 16
- #define EGU4_CH_NUM 16
- #define EGU5_CH_NUM 16
- #define TIMER_PRESENT
- #define TIMER_COUNT 3
- #define TIMER0_MAX_SIZE 32
- #define TIMER1_MAX_SIZE 32
- #define TIMER2_MAX_SIZE 32
- #define TIMER0_CC_NUM 6
- #define TIMER1_CC_NUM 6
- #define TIMER2_CC_NUM 6
- #define RTC_PRESENT
- #define RTC_COUNT 2
- #define RTC0_CC_NUM 4
- #define RTC1_CC_NUM 4
- #define WDT_PRESENT
- #define WDT_COUNT 1
- #define SPIM_PRESENT
- #define SPIM_COUNT 4
- #define SPIM0_MAX_DATARATE 8
- #define SPIM1_MAX_DATARATE 8
- #define SPIM2_MAX_DATARATE 8
- #define SPIM3_MAX_DATARATE 8
- #define SPIM0_EASYDMA_MAXCNT_SIZE 12
- #define SPIM1_EASYDMA_MAXCNT_SIZE 12
- #define SPIM2_EASYDMA_MAXCNT_SIZE 12
- #define SPIM3_EASYDMA_MAXCNT_SIZE 12
- #define SPIS_PRESENT
- #define SPIS_COUNT 4
- #define SPIS0_EASYDMA_MAXCNT_SIZE 12
- #define SPIS1_EASYDMA_MAXCNT_SIZE 12
- #define SPIS2_EASYDMA_MAXCNT_SIZE 12
- #define SPIS3_EASYDMA_MAXCNT_SIZE 12
- #define TWIM_PRESENT
- #define TWIM_COUNT 4
- #define TWIM0_EASYDMA_MAXCNT_SIZE 12
- #define TWIM1_EASYDMA_MAXCNT_SIZE 12
- #define TWIM2_EASYDMA_MAXCNT_SIZE 12
- #define TWIM3_EASYDMA_MAXCNT_SIZE 12
- #define TWIS_PRESENT
- #define TWIS_COUNT 4
- #define TWIS0_EASYDMA_MAXCNT_SIZE 12
- #define TWIS1_EASYDMA_MAXCNT_SIZE 12
- #define TWIS2_EASYDMA_MAXCNT_SIZE 12
- #define TWIS3_EASYDMA_MAXCNT_SIZE 12
- #define UARTE_PRESENT
- #define UARTE_COUNT 4
- #define UARTE0_EASYDMA_MAXCNT_SIZE 12
- #define UARTE1_EASYDMA_MAXCNT_SIZE 12
- #define UARTE2_EASYDMA_MAXCNT_SIZE 12
- #define UARTE3_EASYDMA_MAXCNT_SIZE 12
- #define SAADC_PRESENT
- #define SAADC_COUNT 1
- #define SAADC_CH_NUM 8
- #define SAADC_EASYDMA_MAXCNT_SIZE 15
- #define GPIOTE_PRESENT
- #define GPIOTE_COUNT 2
- #define GPIOTE_CH_NUM 8
- #define GPIOTE_FEATURE_SET_PRESENT
- #define GPIOTE_FEATURE_CLR_PRESENT
- #define PWM_PRESENT
- #define PWM_COUNT 4
- #define PWM_CH_NUM 4
- #define PWM_EASYDMA_MAXCNT_SIZE 15
- #define PDM_PRESENT
- #define PDM_COUNT 1
- #define PDM_EASYDMA_MAXCNT_SIZE 15
- #define I2S_PRESENT
- #define I2S_COUNT 1
- #define I2S_EASYDMA_MAXCNT_SIZE 14
- #define IPC_PRESENT
- #define IPC_COUNT 1
- #define IPC_CH_NUM 8
- #define IPC_CONF_NUM 8
- #define IPC_GPMEM_NUM 4
- #define FPU_PRESENT
- #define FPU_COUNT 1
- #define SPU_PRESENT
- #define SPU_COUNT 1
- #define CRYPTOCELL_PRESENT
- #define CRYPTOCELL_COUNT 1
- #define KMU_PRESENT
- #define KMU_COUNT 1
- #define KMU_KEYSLOT_PRESENT
- #define MAGPIO_PRESENT
- #define MAGPIO_COUNT 1
- #define MAGPIO_PIN_NUM 3
- #define REGULATORS_PRESENT
- #define REGULATORS_COUNT 1
- #endif
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