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- #ifndef NRF_GPIO_H__
- #define NRF_GPIO_H__
- #include <nrfx.h>
- #ifdef __cplusplus
- extern "C" {
- #endif
- #ifndef NRF_P0
- #define NRF_P0 NRF_GPIO
- #endif
- #if (GPIO_COUNT == 1)
- #define NUMBER_OF_PINS (P0_PIN_NUM)
- #define GPIO_REG_LIST {NRF_P0}
- #elif (GPIO_COUNT == 2)
- #define NUMBER_OF_PINS (P0_PIN_NUM + P1_PIN_NUM)
- #define GPIO_REG_LIST {NRF_P0, NRF_P1}
- #else
- #error "Not supported."
- #endif
- #if defined(NRF52820_XXAA)
- #include <nrf_erratas.h>
- #endif
- #if defined(GPIO_LATCH_PIN0_Msk) || defined(__NRFX_DOXYGEN__)
- #define NRF_GPIO_LATCH_PRESENT
- #endif
- #define NRF_GPIO_PIN_MAP(port, pin) (((port) << 5) | ((pin) & 0x1F))
- typedef enum
- {
- NRF_GPIO_PIN_DIR_INPUT = GPIO_PIN_CNF_DIR_Input,
- NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output
- } nrf_gpio_pin_dir_t;
- typedef enum
- {
- NRF_GPIO_PIN_INPUT_CONNECT = GPIO_PIN_CNF_INPUT_Connect,
- NRF_GPIO_PIN_INPUT_DISCONNECT = GPIO_PIN_CNF_INPUT_Disconnect
- } nrf_gpio_pin_input_t;
- typedef enum
- {
- NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled,
- NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown,
- NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup,
- } nrf_gpio_pin_pull_t;
- typedef enum
- {
- NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1,
- NRF_GPIO_PIN_H0S1 = GPIO_PIN_CNF_DRIVE_H0S1,
- NRF_GPIO_PIN_S0H1 = GPIO_PIN_CNF_DRIVE_S0H1,
- NRF_GPIO_PIN_H0H1 = GPIO_PIN_CNF_DRIVE_H0H1,
- NRF_GPIO_PIN_D0S1 = GPIO_PIN_CNF_DRIVE_D0S1,
- NRF_GPIO_PIN_D0H1 = GPIO_PIN_CNF_DRIVE_D0H1,
- NRF_GPIO_PIN_S0D1 = GPIO_PIN_CNF_DRIVE_S0D1,
- NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1,
- } nrf_gpio_pin_drive_t;
- typedef enum
- {
- NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled,
- NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low,
- NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High,
- } nrf_gpio_pin_sense_t;
- __STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end);
- __STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start,
- uint32_t pin_range_end,
- nrf_gpio_pin_pull_t pull_config);
- __STATIC_INLINE void nrf_gpio_cfg(
- uint32_t pin_number,
- nrf_gpio_pin_dir_t dir,
- nrf_gpio_pin_input_t input,
- nrf_gpio_pin_pull_t pull,
- nrf_gpio_pin_drive_t drive,
- nrf_gpio_pin_sense_t sense);
- __STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number);
- __STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config);
- __STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number);
- __STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number);
- __STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number);
- __STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number,
- nrf_gpio_pin_pull_t pull_config,
- nrf_gpio_pin_sense_t sense_config);
- __STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config);
- __STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction);
- __STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number);
- __STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number);
- __STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number);
- __STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value);
- __STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number);
- __STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number);
- __STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number);
- __STATIC_INLINE nrf_gpio_pin_dir_t nrf_gpio_pin_dir_get(uint32_t pin_number);
- __STATIC_INLINE nrf_gpio_pin_input_t nrf_gpio_pin_input_get(uint32_t pin_number);
- __STATIC_INLINE nrf_gpio_pin_pull_t nrf_gpio_pin_pull_get(uint32_t pin_number);
- __STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask);
- __STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask);
- __STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t dir_mask);
- __STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg);
- __STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg);
- __STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg);
- __STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value);
- __STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask);
- __STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask);
- __STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks);
- #if defined(NRF_GPIO_LATCH_PRESENT)
- __STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port,
- uint32_t length,
- uint32_t * p_masks);
- __STATIC_INLINE void nrf_gpio_latches_read_and_clear(uint32_t start_port,
- uint32_t length,
- uint32_t * p_masks);
- __STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number);
- __STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number);
- #endif
- __STATIC_INLINE bool nrf_gpio_pin_present_check(uint32_t pin_number);
- #ifndef SUPPRESS_INLINE_IMPLEMENTATION
- __STATIC_INLINE NRF_GPIO_Type * nrf_gpio_pin_port_decode(uint32_t * p_pin)
- {
- NRFX_ASSERT(nrf_gpio_pin_present_check(*p_pin));
- #if (GPIO_COUNT == 1)
- return NRF_P0;
- #else
- if (*p_pin < P0_PIN_NUM)
- {
- return NRF_P0;
- }
- else
- {
- *p_pin = *p_pin & 0x1F;
- return NRF_P1;
- }
- #endif
- }
- __STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
- {
-
- for (; pin_range_start <= pin_range_end; pin_range_start++)
- {
- nrf_gpio_cfg_output(pin_range_start);
- }
- }
- __STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start,
- uint32_t pin_range_end,
- nrf_gpio_pin_pull_t pull_config)
- {
-
- for (; pin_range_start <= pin_range_end; pin_range_start++)
- {
- nrf_gpio_cfg_input(pin_range_start, pull_config);
- }
- }
- __STATIC_INLINE void nrf_gpio_cfg(
- uint32_t pin_number,
- nrf_gpio_pin_dir_t dir,
- nrf_gpio_pin_input_t input,
- nrf_gpio_pin_pull_t pull,
- nrf_gpio_pin_drive_t drive,
- nrf_gpio_pin_sense_t sense)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- reg->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos)
- | ((uint32_t)input << GPIO_PIN_CNF_INPUT_Pos)
- | ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos)
- | ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos)
- | ((uint32_t)sense << GPIO_PIN_CNF_SENSE_Pos);
- }
- __STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
- {
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_OUTPUT,
- NRF_GPIO_PIN_INPUT_DISCONNECT,
- NRF_GPIO_PIN_NOPULL,
- NRF_GPIO_PIN_S0S1,
- NRF_GPIO_PIN_NOSENSE);
- }
- __STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
- {
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_INPUT,
- NRF_GPIO_PIN_INPUT_CONNECT,
- pull_config,
- NRF_GPIO_PIN_S0S1,
- NRF_GPIO_PIN_NOSENSE);
- }
- __STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number)
- {
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_INPUT,
- NRF_GPIO_PIN_INPUT_DISCONNECT,
- NRF_GPIO_PIN_NOPULL,
- NRF_GPIO_PIN_S0S1,
- NRF_GPIO_PIN_NOSENSE);
- }
- __STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
-
- uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
- reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos);
- }
- __STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
-
- uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
- reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos);
- }
- __STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number,
- nrf_gpio_pin_pull_t pull_config,
- nrf_gpio_pin_sense_t sense_config)
- {
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_INPUT,
- NRF_GPIO_PIN_INPUT_CONNECT,
- pull_config,
- NRF_GPIO_PIN_S0S1,
- sense_config);
- }
- __STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
-
- reg->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_SENSE_Msk;
- reg->PIN_CNF[pin_number] |= (sense_config << GPIO_PIN_CNF_SENSE_Pos);
- }
- __STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
- {
- if (direction == NRF_GPIO_PIN_DIR_INPUT)
- {
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_INPUT,
- NRF_GPIO_PIN_INPUT_CONNECT,
- NRF_GPIO_PIN_NOPULL,
- NRF_GPIO_PIN_S0S1,
- NRF_GPIO_PIN_NOSENSE);
- }
- else
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- reg->DIRSET = (1UL << pin_number);
- }
- }
- __STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- nrf_gpio_port_out_set(reg, 1UL << pin_number);
- }
- __STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- nrf_gpio_port_out_clear(reg, 1UL << pin_number);
- }
- __STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- uint32_t pins_state = reg->OUT;
- reg->OUTSET = (~pins_state & (1UL << pin_number));
- reg->OUTCLR = (pins_state & (1UL << pin_number));
- }
- __STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
- {
- if (value == 0)
- {
- nrf_gpio_pin_clear(pin_number);
- }
- else
- {
- nrf_gpio_pin_set(pin_number);
- }
- }
- __STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL);
- }
- __STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- return ((nrf_gpio_port_out_read(reg) >> pin_number) & 1UL);
- }
- __STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &
- GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos);
- }
- __STATIC_INLINE nrf_gpio_pin_dir_t nrf_gpio_pin_dir_get(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- return (nrf_gpio_pin_dir_t)((reg->PIN_CNF[pin_number] &
- GPIO_PIN_CNF_DIR_Msk) >> GPIO_PIN_CNF_DIR_Pos);
- }
- __STATIC_INLINE nrf_gpio_pin_input_t nrf_gpio_pin_input_get(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- return (nrf_gpio_pin_input_t)((reg->PIN_CNF[pin_number] &
- GPIO_PIN_CNF_INPUT_Msk) >> GPIO_PIN_CNF_INPUT_Pos);
- }
- __STATIC_INLINE nrf_gpio_pin_pull_t nrf_gpio_pin_pull_get(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- return (nrf_gpio_pin_pull_t)((reg->PIN_CNF[pin_number] &
- GPIO_PIN_CNF_PULL_Msk) >> GPIO_PIN_CNF_PULL_Pos);
- }
- __STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask)
- {
- p_reg->DIRSET = out_mask;
- }
- __STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask)
- {
- p_reg->DIRCLR = in_mask;
- }
- __STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t value)
- {
- p_reg->DIR = value;
- }
- __STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg)
- {
- return p_reg->DIR;
- }
- __STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg)
- {
- return p_reg->IN;
- }
- __STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg)
- {
- return p_reg->OUT;
- }
- __STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value)
- {
- p_reg->OUT = value;
- }
- __STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask)
- {
- p_reg->OUTSET = set_mask;
- }
- __STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask)
- {
- p_reg->OUTCLR = clr_mask;
- }
- __STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks)
- {
- NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST;
- NRFX_ASSERT(start_port + length <= GPIO_COUNT);
- uint32_t i;
- for (i = start_port; i < (start_port + length); i++)
- {
- *p_masks = nrf_gpio_port_in_read(gpio_regs[i]);
- p_masks++;
- }
- }
- #if defined(NRF_GPIO_LATCH_PRESENT)
- __STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port,
- uint32_t length,
- uint32_t * p_masks)
- {
- NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST;
- uint32_t i;
- for (i = start_port; i < (start_port + length); i++)
- {
- *p_masks = gpio_regs[i]->LATCH;
- p_masks++;
- }
- }
- __STATIC_INLINE void nrf_gpio_latches_read_and_clear(uint32_t start_port,
- uint32_t length,
- uint32_t * p_masks)
- {
- NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST;
- uint32_t i;
- for (i = start_port; i < (start_port + length); i++)
- {
- *p_masks = gpio_regs[i]->LATCH;
-
- gpio_regs[i]->LATCH = *p_masks;
- p_masks++;
- }
- }
- __STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- return (reg->LATCH & (1 << pin_number)) ? 1 : 0;
- }
- __STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number)
- {
- NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
- reg->LATCH = (1 << pin_number);
- }
- #endif
- __STATIC_INLINE bool nrf_gpio_pin_present_check(uint32_t pin_number)
- {
- uint32_t port = pin_number >> 5;
- uint32_t mask = 0;
- switch (port)
- {
- #ifdef P0_FEATURE_PINS_PRESENT
- case 0:
- mask = P0_FEATURE_PINS_PRESENT;
- #if defined(NRF52820_XXAA) && defined(DEVELOP_IN_NRF52833)
-
- mask |= 0x03003800;
- #endif
- break;
- #endif
- #ifdef P1_FEATURE_PINS_PRESENT
- case 1:
- mask = P1_FEATURE_PINS_PRESENT;
- break;
- #endif
- }
- pin_number &= 0x1F;
- return (mask & (1UL << pin_number)) ? true : false;
- }
- #endif
- #ifdef __cplusplus
- }
- #endif
- #endif
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