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- #ifndef NRFX_IRQS_NRF9160_H__
- #define NRFX_IRQS_NRF9160_H__
- #ifdef __cplusplus
- extern "C" {
- #endif
- #define nrfx_power_clock_irq_handler CLOCK_POWER_IRQHandler
- #if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED)
- #define nrfx_prs_box_0_irq_handler UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
- #else
- #define nrfx_spim_0_irq_handler UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
- #define nrfx_spis_0_irq_handler UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
- #define nrfx_twim_0_irq_handler UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
- #define nrfx_twis_0_irq_handler UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
- #define nrfx_uarte_0_irq_handler UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
- #endif
- #if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED)
- #define nrfx_prs_box_1_irq_handler UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
- #else
- #define nrfx_spim_1_irq_handler UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
- #define nrfx_spis_1_irq_handler UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
- #define nrfx_twim_1_irq_handler UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
- #define nrfx_twis_1_irq_handler UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
- #define nrfx_uarte_1_irq_handler UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
- #endif
- #if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_2_ENABLED)
- #define nrfx_prs_box_2_irq_handler UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
- #else
- #define nrfx_spim_2_irq_handler UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
- #define nrfx_spis_2_irq_handler UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
- #define nrfx_twim_2_irq_handler UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
- #define nrfx_twis_2_irq_handler UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
- #define nrfx_uarte_2_irq_handler UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
- #endif
- #if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_3_ENABLED)
- #define nrfx_prs_box_3_irq_handler UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
- #else
- #define nrfx_spim_3_irq_handler UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
- #define nrfx_spis_3_irq_handler UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
- #define nrfx_twim_3_irq_handler UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
- #define nrfx_twis_3_irq_handler UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
- #define nrfx_uarte_3_irq_handler UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
- #endif
- #define nrfx_gpiote_irq_handler GPIOTE_IRQHandler
- #define nrfx_saadc_irq_handler SAADC_IRQHandler
- #define nrfx_timer_0_irq_handler TIMER0_IRQHandler
- #define nrfx_timer_1_irq_handler TIMER1_IRQHandler
- #define nrfx_timer_2_irq_handler TIMER2_IRQHandler
- #define nrfx_rtc_0_irq_handler RTC0_IRQHandler
- #define nrfx_rtc_1_irq_handler RTC1_IRQHandler
- #define nrfx_wdt_irq_handler WDT_IRQHandler
- #define nrfx_swi_0_irq_handler EGU0_IRQHandler
- #define nrfx_swi_1_irq_handler EGU1_IRQHandler
- #define nrfx_swi_2_irq_handler EGU2_IRQHandler
- #define nrfx_swi_3_irq_handler EGU3_IRQHandler
- #define nrfx_swi_4_irq_handler EGU4_IRQHandler
- #define nrfx_swi_5_irq_handler EGU5_IRQHandler
- #define nrfx_pwm_0_irq_handler PWM0_IRQHandler
- #define nrfx_pwm_1_irq_handler PWM1_IRQHandler
- #define nrfx_pwm_2_irq_handler PWM2_IRQHandler
- #define nrfx_pwm_3_irq_handler PWM3_IRQHandler
- #define nrfx_pdm_irq_handler PDM_IRQHandler
- #define nrfx_i2s_irq_handler I2S_IRQHandler
- #ifdef __cplusplus
- }
- #endif
- #endif
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