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- #ifndef NRF51_H
- #define NRF51_H
- #ifdef __cplusplus
- extern "C" {
- #endif
- typedef enum {
- Reset_IRQn = -15,
- NonMaskableInt_IRQn = -14,
- HardFault_IRQn = -13,
- SVCall_IRQn = -5,
- PendSV_IRQn = -2,
- SysTick_IRQn = -1,
- POWER_CLOCK_IRQn = 0,
- RADIO_IRQn = 1,
- UART0_IRQn = 2,
- SPI0_TWI0_IRQn = 3,
- SPI1_TWI1_IRQn = 4,
- GPIOTE_IRQn = 6,
- ADC_IRQn = 7,
- TIMER0_IRQn = 8,
- TIMER1_IRQn = 9,
- TIMER2_IRQn = 10,
- RTC0_IRQn = 11,
- TEMP_IRQn = 12,
- RNG_IRQn = 13,
- ECB_IRQn = 14,
- CCM_AAR_IRQn = 15,
- WDT_IRQn = 16,
- RTC1_IRQn = 17,
- QDEC_IRQn = 18,
- LPCOMP_IRQn = 19,
- SWI0_IRQn = 20,
- SWI1_IRQn = 21,
- SWI2_IRQn = 22,
- SWI3_IRQn = 23,
- SWI4_IRQn = 24,
- SWI5_IRQn = 25
- } IRQn_Type;
- #define __CM0_REV 0x0301U
- #define __DSP_PRESENT 0
- #define __VTOR_PRESENT 0
- #define __NVIC_PRIO_BITS 2
- #define __Vendor_SysTickConfig 0
- #define __MPU_PRESENT 0
- #define __FPU_PRESENT 0
-
- #include "core_cm0.h"
- #include "system_nrf51.h"
- #ifndef __IM
- #define __IM __I
- #endif
- #ifndef __OM
- #define __OM __O
- #endif
- #ifndef __IOM
- #define __IOM __IO
- #endif
- #if defined (__CC_ARM)
- #pragma push
- #pragma anon_unions
- #elif defined (__ICCARM__)
- #pragma language=extended
- #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #pragma clang diagnostic push
- #pragma clang diagnostic ignored "-Wc11-extensions"
- #pragma clang diagnostic ignored "-Wreserved-id-macro"
- #pragma clang diagnostic ignored "-Wgnu-anonymous-struct"
- #pragma clang diagnostic ignored "-Wnested-anon-types"
- #elif defined (__GNUC__)
-
- #elif defined (__TMS470__)
-
- #elif defined (__TASKING__)
- #pragma warning 586
- #elif defined (__CSMC__)
-
- #else
- #warning Not supported compiler type
- #endif
- typedef struct {
- __OM uint32_t EN;
- __OM uint32_t DIS;
- } PPI_TASKS_CHG_Type;
- typedef struct {
- __IOM uint32_t EEP;
- __IOM uint32_t TEP;
- } PPI_CH_Type;
-
- typedef struct {
- __IM uint32_t RESERVED[30];
- __OM uint32_t TASKS_CONSTLAT;
- __OM uint32_t TASKS_LOWPWR;
- __IM uint32_t RESERVED1[34];
- __IOM uint32_t EVENTS_POFWARN;
- __IM uint32_t RESERVED2[126];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED3[61];
- __IOM uint32_t RESETREAS;
- __IM uint32_t RESERVED4[9];
- __IM uint32_t RAMSTATUS;
- __IM uint32_t RESERVED5[53];
- __OM uint32_t SYSTEMOFF;
- __IM uint32_t RESERVED6[3];
- __IOM uint32_t POFCON;
- __IM uint32_t RESERVED7[2];
- __IOM uint32_t GPREGRET;
- __IM uint32_t RESERVED8;
- __IOM uint32_t RAMON;
- __IM uint32_t RESERVED9[7];
- __IOM uint32_t RESET;
- __IM uint32_t RESERVED10[3];
- __IOM uint32_t RAMONB;
- __IM uint32_t RESERVED11[8];
- __IOM uint32_t DCDCEN;
- __IM uint32_t RESERVED12[291];
- __IOM uint32_t DCDCFORCE;
- } NRF_POWER_Type;
- typedef struct {
- __OM uint32_t TASKS_HFCLKSTART;
- __OM uint32_t TASKS_HFCLKSTOP;
- __OM uint32_t TASKS_LFCLKSTART;
- __OM uint32_t TASKS_LFCLKSTOP;
- __OM uint32_t TASKS_CAL;
- __OM uint32_t TASKS_CTSTART;
- __OM uint32_t TASKS_CTSTOP;
- __IM uint32_t RESERVED[57];
- __IOM uint32_t EVENTS_HFCLKSTARTED;
- __IOM uint32_t EVENTS_LFCLKSTARTED;
- __IM uint32_t RESERVED1;
- __IOM uint32_t EVENTS_DONE;
- __IOM uint32_t EVENTS_CTTO;
- __IM uint32_t RESERVED2[124];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED3[63];
- __IM uint32_t HFCLKRUN;
- __IM uint32_t HFCLKSTAT;
- __IM uint32_t RESERVED4;
- __IM uint32_t LFCLKRUN;
- __IM uint32_t LFCLKSTAT;
- __IM uint32_t LFCLKSRCCOPY;
- __IM uint32_t RESERVED5[62];
- __IOM uint32_t LFCLKSRC;
- __IM uint32_t RESERVED6[7];
- __IOM uint32_t CTIV;
- __IM uint32_t RESERVED7[5];
- __IOM uint32_t XTALFREQ;
- } NRF_CLOCK_Type;
- typedef struct {
- __IM uint32_t RESERVED[330];
- __IOM uint32_t PERR0;
- __IOM uint32_t RLENR0;
- __IM uint32_t RESERVED1[52];
- __IOM uint32_t PROTENSET0;
- __IOM uint32_t PROTENSET1;
- __IOM uint32_t DISABLEINDEBUG;
- __IOM uint32_t PROTBLOCKSIZE;
- } NRF_MPU_Type;
- typedef struct {
- __OM uint32_t TASKS_TXEN;
- __OM uint32_t TASKS_RXEN;
- __OM uint32_t TASKS_START;
- __OM uint32_t TASKS_STOP;
- __OM uint32_t TASKS_DISABLE;
- __OM uint32_t TASKS_RSSISTART;
- __OM uint32_t TASKS_RSSISTOP;
- __OM uint32_t TASKS_BCSTART;
- __OM uint32_t TASKS_BCSTOP;
- __IM uint32_t RESERVED[55];
- __IOM uint32_t EVENTS_READY;
- __IOM uint32_t EVENTS_ADDRESS;
- __IOM uint32_t EVENTS_PAYLOAD;
- __IOM uint32_t EVENTS_END;
- __IOM uint32_t EVENTS_DISABLED;
- __IOM uint32_t EVENTS_DEVMATCH;
- __IOM uint32_t EVENTS_DEVMISS;
- __IOM uint32_t EVENTS_RSSIEND;
- __IM uint32_t RESERVED1[2];
- __IOM uint32_t EVENTS_BCMATCH;
- __IM uint32_t RESERVED2[53];
- __IOM uint32_t SHORTS;
- __IM uint32_t RESERVED3[64];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED4[61];
- __IM uint32_t CRCSTATUS;
- __IM uint32_t RESERVED5;
- __IM uint32_t RXMATCH;
- __IM uint32_t RXCRC;
- __IM uint32_t DAI;
- __IM uint32_t RESERVED6[60];
- __IOM uint32_t PACKETPTR;
- __IOM uint32_t FREQUENCY;
- __IOM uint32_t TXPOWER;
- __IOM uint32_t MODE;
- __IOM uint32_t PCNF0;
- __IOM uint32_t PCNF1;
- __IOM uint32_t BASE0;
- __IOM uint32_t BASE1;
- __IOM uint32_t PREFIX0;
- __IOM uint32_t PREFIX1;
- __IOM uint32_t TXADDRESS;
- __IOM uint32_t RXADDRESSES;
- __IOM uint32_t CRCCNF;
- __IOM uint32_t CRCPOLY;
- __IOM uint32_t CRCINIT;
- __IOM uint32_t TEST;
- __IOM uint32_t TIFS;
- __IM uint32_t RSSISAMPLE;
- __IM uint32_t RESERVED7;
- __IM uint32_t STATE;
- __IOM uint32_t DATAWHITEIV;
- __IM uint32_t RESERVED8[2];
- __IOM uint32_t BCC;
- __IM uint32_t RESERVED9[39];
- __IOM uint32_t DAB[8];
- __IOM uint32_t DAP[8];
- __IOM uint32_t DACNF;
- __IM uint32_t RESERVED10[56];
- __IOM uint32_t OVERRIDE0;
- __IOM uint32_t OVERRIDE1;
- __IOM uint32_t OVERRIDE2;
- __IOM uint32_t OVERRIDE3;
- __IOM uint32_t OVERRIDE4;
- __IM uint32_t RESERVED11[561];
- __IOM uint32_t POWER;
- } NRF_RADIO_Type;
- typedef struct {
- __OM uint32_t TASKS_STARTRX;
- __OM uint32_t TASKS_STOPRX;
- __OM uint32_t TASKS_STARTTX;
- __OM uint32_t TASKS_STOPTX;
- __IM uint32_t RESERVED[3];
- __OM uint32_t TASKS_SUSPEND;
- __IM uint32_t RESERVED1[56];
- __IOM uint32_t EVENTS_CTS;
- __IOM uint32_t EVENTS_NCTS;
- __IOM uint32_t EVENTS_RXDRDY;
- __IM uint32_t RESERVED2[4];
- __IOM uint32_t EVENTS_TXDRDY;
- __IM uint32_t RESERVED3;
- __IOM uint32_t EVENTS_ERROR;
- __IM uint32_t RESERVED4[7];
- __IOM uint32_t EVENTS_RXTO;
- __IM uint32_t RESERVED5[46];
- __IOM uint32_t SHORTS;
- __IM uint32_t RESERVED6[64];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED7[93];
- __IOM uint32_t ERRORSRC;
- __IM uint32_t RESERVED8[31];
- __IOM uint32_t ENABLE;
- __IM uint32_t RESERVED9;
- __IOM uint32_t PSELRTS;
- __IOM uint32_t PSELTXD;
- __IOM uint32_t PSELCTS;
- __IOM uint32_t PSELRXD;
- __IM uint32_t RXD;
- __OM uint32_t TXD;
- __IM uint32_t RESERVED10;
- __IOM uint32_t BAUDRATE;
- __IM uint32_t RESERVED11[17];
- __IOM uint32_t CONFIG;
- __IM uint32_t RESERVED12[675];
- __IOM uint32_t POWER;
- } NRF_UART_Type;
- typedef struct {
- __IM uint32_t RESERVED[66];
- __IOM uint32_t EVENTS_READY;
- __IM uint32_t RESERVED1[126];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED2[125];
- __IOM uint32_t ENABLE;
- __IM uint32_t RESERVED3;
- __IOM uint32_t PSELSCK;
- __IOM uint32_t PSELMOSI;
- __IOM uint32_t PSELMISO;
- __IM uint32_t RESERVED4;
- __IM uint32_t RXD;
- __IOM uint32_t TXD;
- __IM uint32_t RESERVED5;
- __IOM uint32_t FREQUENCY;
- __IM uint32_t RESERVED6[11];
- __IOM uint32_t CONFIG;
- __IM uint32_t RESERVED7[681];
- __IOM uint32_t POWER;
- } NRF_SPI_Type;
- typedef struct {
- __OM uint32_t TASKS_STARTRX;
- __IM uint32_t RESERVED;
- __OM uint32_t TASKS_STARTTX;
- __IM uint32_t RESERVED1[2];
- __OM uint32_t TASKS_STOP;
- __IM uint32_t RESERVED2;
- __OM uint32_t TASKS_SUSPEND;
- __OM uint32_t TASKS_RESUME;
- __IM uint32_t RESERVED3[56];
- __IOM uint32_t EVENTS_STOPPED;
- __IOM uint32_t EVENTS_RXDREADY;
- __IM uint32_t RESERVED4[4];
- __IOM uint32_t EVENTS_TXDSENT;
- __IM uint32_t RESERVED5;
- __IOM uint32_t EVENTS_ERROR;
- __IM uint32_t RESERVED6[4];
- __IOM uint32_t EVENTS_BB;
- __IM uint32_t RESERVED7[3];
- __IOM uint32_t EVENTS_SUSPENDED;
- __IM uint32_t RESERVED8[45];
- __IOM uint32_t SHORTS;
- __IM uint32_t RESERVED9[64];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED10[110];
- __IOM uint32_t ERRORSRC;
- __IM uint32_t RESERVED11[14];
- __IOM uint32_t ENABLE;
- __IM uint32_t RESERVED12;
- __IOM uint32_t PSELSCL;
- __IOM uint32_t PSELSDA;
- __IM uint32_t RESERVED13[2];
- __IM uint32_t RXD;
- __IOM uint32_t TXD;
- __IM uint32_t RESERVED14;
- __IOM uint32_t FREQUENCY;
- __IM uint32_t RESERVED15[24];
- __IOM uint32_t ADDRESS;
- __IM uint32_t RESERVED16[668];
- __IOM uint32_t POWER;
- } NRF_TWI_Type;
- typedef struct {
- __IM uint32_t RESERVED[9];
- __OM uint32_t TASKS_ACQUIRE;
- __OM uint32_t TASKS_RELEASE;
- __IM uint32_t RESERVED1[54];
- __IOM uint32_t EVENTS_END;
- __IM uint32_t RESERVED2[2];
- __IOM uint32_t EVENTS_ENDRX;
- __IM uint32_t RESERVED3[5];
- __IOM uint32_t EVENTS_ACQUIRED;
- __IM uint32_t RESERVED4[53];
- __IOM uint32_t SHORTS;
- __IM uint32_t RESERVED5[64];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED6[61];
- __IM uint32_t SEMSTAT;
- __IM uint32_t RESERVED7[15];
- __IOM uint32_t STATUS;
- __IM uint32_t RESERVED8[47];
- __IOM uint32_t ENABLE;
- __IM uint32_t RESERVED9;
- __IOM uint32_t PSELSCK;
- __IOM uint32_t PSELMISO;
- __IOM uint32_t PSELMOSI;
- __IOM uint32_t PSELCSN;
- __IM uint32_t RESERVED10[7];
- __IOM uint32_t RXDPTR;
- __IOM uint32_t MAXRX;
- __IM uint32_t AMOUNTRX;
- __IM uint32_t RESERVED11;
- __IOM uint32_t TXDPTR;
- __IOM uint32_t MAXTX;
- __IM uint32_t AMOUNTTX;
- __IM uint32_t RESERVED12;
- __IOM uint32_t CONFIG;
- __IM uint32_t RESERVED13;
- __IOM uint32_t DEF;
- __IM uint32_t RESERVED14[24];
- __IOM uint32_t ORC;
- __IM uint32_t RESERVED15[654];
- __IOM uint32_t POWER;
- } NRF_SPIS_Type;
- typedef struct {
- __OM uint32_t TASKS_OUT[4];
- __IM uint32_t RESERVED[60];
- __IOM uint32_t EVENTS_IN[4];
- __IM uint32_t RESERVED1[27];
- __IOM uint32_t EVENTS_PORT;
- __IM uint32_t RESERVED2[97];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED3[129];
- __IOM uint32_t CONFIG[4];
- __IM uint32_t RESERVED4[695];
- __IOM uint32_t POWER;
- } NRF_GPIOTE_Type;
- typedef struct {
- __OM uint32_t TASKS_START;
- __OM uint32_t TASKS_STOP;
- __IM uint32_t RESERVED[62];
- __IOM uint32_t EVENTS_END;
- __IM uint32_t RESERVED1[128];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED2[61];
- __IM uint32_t BUSY;
- __IM uint32_t RESERVED3[63];
- __IOM uint32_t ENABLE;
- __IOM uint32_t CONFIG;
- __IM uint32_t RESULT;
- __IM uint32_t RESERVED4[700];
- __IOM uint32_t POWER;
- } NRF_ADC_Type;
- typedef struct {
- __OM uint32_t TASKS_START;
- __OM uint32_t TASKS_STOP;
- __OM uint32_t TASKS_COUNT;
- __OM uint32_t TASKS_CLEAR;
- __OM uint32_t TASKS_SHUTDOWN;
- __IM uint32_t RESERVED[11];
- __OM uint32_t TASKS_CAPTURE[4];
- __IM uint32_t RESERVED1[60];
- __IOM uint32_t EVENTS_COMPARE[4];
- __IM uint32_t RESERVED2[44];
- __IOM uint32_t SHORTS;
- __IM uint32_t RESERVED3[64];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED4[126];
- __IOM uint32_t MODE;
- __IOM uint32_t BITMODE;
- __IM uint32_t RESERVED5;
- __IOM uint32_t PRESCALER;
- __IM uint32_t RESERVED6[11];
- __IOM uint32_t CC[4];
- __IM uint32_t RESERVED7[683];
- __IOM uint32_t POWER;
- } NRF_TIMER_Type;
- typedef struct {
- __OM uint32_t TASKS_START;
- __OM uint32_t TASKS_STOP;
- __OM uint32_t TASKS_CLEAR;
- __OM uint32_t TASKS_TRIGOVRFLW;
- __IM uint32_t RESERVED[60];
- __IOM uint32_t EVENTS_TICK;
- __IOM uint32_t EVENTS_OVRFLW;
- __IM uint32_t RESERVED1[14];
- __IOM uint32_t EVENTS_COMPARE[4];
- __IM uint32_t RESERVED2[109];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED3[13];
- __IOM uint32_t EVTEN;
- __IOM uint32_t EVTENSET;
- __IOM uint32_t EVTENCLR;
- __IM uint32_t RESERVED4[110];
- __IM uint32_t COUNTER;
- __IOM uint32_t PRESCALER;
- __IM uint32_t RESERVED5[13];
- __IOM uint32_t CC[4];
- __IM uint32_t RESERVED6[683];
- __IOM uint32_t POWER;
- } NRF_RTC_Type;
- typedef struct {
- __OM uint32_t TASKS_START;
- __OM uint32_t TASKS_STOP;
- __IM uint32_t RESERVED[62];
- __IOM uint32_t EVENTS_DATARDY;
- __IM uint32_t RESERVED1[128];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED2[127];
- __IM int32_t TEMP;
- __IM uint32_t RESERVED3[700];
- __IOM uint32_t POWER;
- } NRF_TEMP_Type;
- typedef struct {
- __OM uint32_t TASKS_START;
- __OM uint32_t TASKS_STOP;
- __IM uint32_t RESERVED[62];
- __IOM uint32_t EVENTS_VALRDY;
- __IM uint32_t RESERVED1[63];
- __IOM uint32_t SHORTS;
- __IM uint32_t RESERVED2[64];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED3[126];
- __IOM uint32_t CONFIG;
- __IM uint32_t VALUE;
- __IM uint32_t RESERVED4[700];
- __IOM uint32_t POWER;
- } NRF_RNG_Type;
- typedef struct {
- __OM uint32_t TASKS_STARTECB;
- __OM uint32_t TASKS_STOPECB;
- __IM uint32_t RESERVED[62];
- __IOM uint32_t EVENTS_ENDECB;
- __IOM uint32_t EVENTS_ERRORECB;
- __IM uint32_t RESERVED1[127];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED2[126];
- __IOM uint32_t ECBDATAPTR;
- __IM uint32_t RESERVED3[701];
- __IOM uint32_t POWER;
- } NRF_ECB_Type;
- typedef struct {
- __OM uint32_t TASKS_START;
- __IM uint32_t RESERVED;
- __OM uint32_t TASKS_STOP;
- __IM uint32_t RESERVED1[61];
- __IOM uint32_t EVENTS_END;
- __IOM uint32_t EVENTS_RESOLVED;
- __IOM uint32_t EVENTS_NOTRESOLVED;
- __IM uint32_t RESERVED2[126];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED3[61];
- __IM uint32_t STATUS;
- __IM uint32_t RESERVED4[63];
- __IOM uint32_t ENABLE;
- __IOM uint32_t NIRK;
- __IOM uint32_t IRKPTR;
- __IM uint32_t RESERVED5;
- __IOM uint32_t ADDRPTR;
- __IOM uint32_t SCRATCHPTR;
- __IM uint32_t RESERVED6[697];
- __IOM uint32_t POWER;
- } NRF_AAR_Type;
- typedef struct {
- __OM uint32_t TASKS_KSGEN;
- __OM uint32_t TASKS_CRYPT;
- __OM uint32_t TASKS_STOP;
- __IM uint32_t RESERVED[61];
- __IOM uint32_t EVENTS_ENDKSGEN;
- __IOM uint32_t EVENTS_ENDCRYPT;
- __IOM uint32_t EVENTS_ERROR;
- __IM uint32_t RESERVED1[61];
- __IOM uint32_t SHORTS;
- __IM uint32_t RESERVED2[64];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED3[61];
- __IM uint32_t MICSTATUS;
- __IM uint32_t RESERVED4[63];
- __IOM uint32_t ENABLE;
- __IOM uint32_t MODE;
- __IOM uint32_t CNFPTR;
- __IOM uint32_t INPTR;
- __IOM uint32_t OUTPTR;
- __IOM uint32_t SCRATCHPTR;
- __IM uint32_t RESERVED5[697];
- __IOM uint32_t POWER;
- } NRF_CCM_Type;
- typedef struct {
- __OM uint32_t TASKS_START;
- __IM uint32_t RESERVED[63];
- __IOM uint32_t EVENTS_TIMEOUT;
- __IM uint32_t RESERVED1[128];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED2[61];
- __IM uint32_t RUNSTATUS;
- __IM uint32_t REQSTATUS;
- __IM uint32_t RESERVED3[63];
- __IOM uint32_t CRV;
- __IOM uint32_t RREN;
- __IOM uint32_t CONFIG;
- __IM uint32_t RESERVED4[60];
- __OM uint32_t RR[8];
- __IM uint32_t RESERVED5[631];
- __IOM uint32_t POWER;
- } NRF_WDT_Type;
- typedef struct {
- __OM uint32_t TASKS_START;
- __OM uint32_t TASKS_STOP;
- __OM uint32_t TASKS_READCLRACC;
- __IM uint32_t RESERVED[61];
- __IOM uint32_t EVENTS_SAMPLERDY;
- __IOM uint32_t EVENTS_REPORTRDY;
- __IOM uint32_t EVENTS_ACCOF;
- __IM uint32_t RESERVED1[61];
- __IOM uint32_t SHORTS;
- __IM uint32_t RESERVED2[64];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED3[125];
- __IOM uint32_t ENABLE;
- __IOM uint32_t LEDPOL;
- __IOM uint32_t SAMPLEPER;
- __IM int32_t SAMPLE;
- __IOM uint32_t REPORTPER;
- __IM int32_t ACC;
- __IM int32_t ACCREAD;
- __IOM uint32_t PSELLED;
- __IOM uint32_t PSELA;
- __IOM uint32_t PSELB;
- __IOM uint32_t DBFEN;
- __IM uint32_t RESERVED4[5];
- __IOM uint32_t LEDPRE;
- __IM uint32_t ACCDBL;
- __IM uint32_t ACCDBLREAD;
- __IM uint32_t RESERVED5[684];
- __IOM uint32_t POWER;
- } NRF_QDEC_Type;
- typedef struct {
- __OM uint32_t TASKS_START;
- __OM uint32_t TASKS_STOP;
- __OM uint32_t TASKS_SAMPLE;
- __IM uint32_t RESERVED[61];
- __IOM uint32_t EVENTS_READY;
- __IOM uint32_t EVENTS_DOWN;
- __IOM uint32_t EVENTS_UP;
- __IOM uint32_t EVENTS_CROSS;
- __IM uint32_t RESERVED1[60];
- __IOM uint32_t SHORTS;
- __IM uint32_t RESERVED2[64];
- __IOM uint32_t INTENSET;
- __IOM uint32_t INTENCLR;
- __IM uint32_t RESERVED3[61];
- __IM uint32_t RESULT;
- __IM uint32_t RESERVED4[63];
- __IOM uint32_t ENABLE;
- __IOM uint32_t PSEL;
- __IOM uint32_t REFSEL;
- __IOM uint32_t EXTREFSEL;
- __IM uint32_t RESERVED5[4];
- __IOM uint32_t ANADETECT;
- __IM uint32_t RESERVED6[694];
- __IOM uint32_t POWER;
- } NRF_LPCOMP_Type;
- typedef struct {
- __IM uint32_t UNUSED;
- } NRF_SWI_Type;
- typedef struct {
- __IM uint32_t RESERVED[256];
- __IM uint32_t READY;
- __IM uint32_t RESERVED1[64];
- __IOM uint32_t CONFIG;
-
- union {
- __IOM uint32_t ERASEPAGE;
- __IOM uint32_t ERASEPCR1;
- };
- __IOM uint32_t ERASEALL;
- __IOM uint32_t ERASEPCR0;
- __IOM uint32_t ERASEUICR;
- } NRF_NVMC_Type;
- typedef struct {
- __IOM PPI_TASKS_CHG_Type TASKS_CHG[4];
- __IM uint32_t RESERVED[312];
- __IOM uint32_t CHEN;
- __IOM uint32_t CHENSET;
- __IOM uint32_t CHENCLR;
- __IM uint32_t RESERVED1;
- __IOM PPI_CH_Type CH[16];
- __IM uint32_t RESERVED2[156];
- __IOM uint32_t CHG[4];
- } NRF_PPI_Type;
- typedef struct {
- __IM uint32_t RESERVED[4];
- __IM uint32_t CODEPAGESIZE;
- __IM uint32_t CODESIZE;
- __IM uint32_t RESERVED1[4];
- __IM uint32_t CLENR0;
- __IM uint32_t PPFC;
- __IM uint32_t RESERVED2;
- __IM uint32_t NUMRAMBLOCK;
-
- union {
- __IM uint32_t SIZERAMBLOCKS;
- __IM uint32_t SIZERAMBLOCK[4];
- };
- __IM uint32_t RESERVED3[5];
- __IM uint32_t CONFIGID;
- __IM uint32_t DEVICEID[2];
- __IM uint32_t RESERVED4[6];
- __IM uint32_t ER[4];
- __IM uint32_t IR[4];
- __IM uint32_t DEVICEADDRTYPE;
- __IM uint32_t DEVICEADDR[2];
- __IM uint32_t OVERRIDEEN;
- __IM uint32_t NRF_1MBIT[5];
- __IM uint32_t RESERVED5[10];
- __IM uint32_t BLE_1MBIT[5];
- } NRF_FICR_Type;
- typedef struct {
- __IOM uint32_t CLENR0;
- __IOM uint32_t RBPCONF;
- __IOM uint32_t XTALFREQ;
- __IM uint32_t RESERVED;
- __IM uint32_t FWID;
-
- union {
- __IOM uint32_t BOOTLOADERADDR;
- __IOM uint32_t NRFFW[15];
- };
- __IOM uint32_t NRFHW[12];
- __IOM uint32_t CUSTOMER[32];
- } NRF_UICR_Type;
- typedef struct {
- __IM uint32_t RESERVED[321];
- __IOM uint32_t OUT;
- __IOM uint32_t OUTSET;
- __IOM uint32_t OUTCLR;
- __IM uint32_t IN;
- __IOM uint32_t DIR;
- __IOM uint32_t DIRSET;
- __IOM uint32_t DIRCLR;
- __IM uint32_t RESERVED1[120];
- __IOM uint32_t PIN_CNF[32];
- } NRF_GPIO_Type;
-
- #define NRF_POWER_BASE 0x40000000UL
- #define NRF_CLOCK_BASE 0x40000000UL
- #define NRF_MPU_BASE 0x40000000UL
- #define NRF_RADIO_BASE 0x40001000UL
- #define NRF_UART0_BASE 0x40002000UL
- #define NRF_SPI0_BASE 0x40003000UL
- #define NRF_TWI0_BASE 0x40003000UL
- #define NRF_SPI1_BASE 0x40004000UL
- #define NRF_TWI1_BASE 0x40004000UL
- #define NRF_SPIS1_BASE 0x40004000UL
- #define NRF_GPIOTE_BASE 0x40006000UL
- #define NRF_ADC_BASE 0x40007000UL
- #define NRF_TIMER0_BASE 0x40008000UL
- #define NRF_TIMER1_BASE 0x40009000UL
- #define NRF_TIMER2_BASE 0x4000A000UL
- #define NRF_RTC0_BASE 0x4000B000UL
- #define NRF_TEMP_BASE 0x4000C000UL
- #define NRF_RNG_BASE 0x4000D000UL
- #define NRF_ECB_BASE 0x4000E000UL
- #define NRF_AAR_BASE 0x4000F000UL
- #define NRF_CCM_BASE 0x4000F000UL
- #define NRF_WDT_BASE 0x40010000UL
- #define NRF_RTC1_BASE 0x40011000UL
- #define NRF_QDEC_BASE 0x40012000UL
- #define NRF_LPCOMP_BASE 0x40013000UL
- #define NRF_SWI_BASE 0x40014000UL
- #define NRF_NVMC_BASE 0x4001E000UL
- #define NRF_PPI_BASE 0x4001F000UL
- #define NRF_FICR_BASE 0x10000000UL
- #define NRF_UICR_BASE 0x10001000UL
- #define NRF_GPIO_BASE 0x50000000UL
-
- #define NRF_POWER ((NRF_POWER_Type*) NRF_POWER_BASE)
- #define NRF_CLOCK ((NRF_CLOCK_Type*) NRF_CLOCK_BASE)
- #define NRF_MPU ((NRF_MPU_Type*) NRF_MPU_BASE)
- #define NRF_RADIO ((NRF_RADIO_Type*) NRF_RADIO_BASE)
- #define NRF_UART0 ((NRF_UART_Type*) NRF_UART0_BASE)
- #define NRF_SPI0 ((NRF_SPI_Type*) NRF_SPI0_BASE)
- #define NRF_TWI0 ((NRF_TWI_Type*) NRF_TWI0_BASE)
- #define NRF_SPI1 ((NRF_SPI_Type*) NRF_SPI1_BASE)
- #define NRF_TWI1 ((NRF_TWI_Type*) NRF_TWI1_BASE)
- #define NRF_SPIS1 ((NRF_SPIS_Type*) NRF_SPIS1_BASE)
- #define NRF_GPIOTE ((NRF_GPIOTE_Type*) NRF_GPIOTE_BASE)
- #define NRF_ADC ((NRF_ADC_Type*) NRF_ADC_BASE)
- #define NRF_TIMER0 ((NRF_TIMER_Type*) NRF_TIMER0_BASE)
- #define NRF_TIMER1 ((NRF_TIMER_Type*) NRF_TIMER1_BASE)
- #define NRF_TIMER2 ((NRF_TIMER_Type*) NRF_TIMER2_BASE)
- #define NRF_RTC0 ((NRF_RTC_Type*) NRF_RTC0_BASE)
- #define NRF_TEMP ((NRF_TEMP_Type*) NRF_TEMP_BASE)
- #define NRF_RNG ((NRF_RNG_Type*) NRF_RNG_BASE)
- #define NRF_ECB ((NRF_ECB_Type*) NRF_ECB_BASE)
- #define NRF_AAR ((NRF_AAR_Type*) NRF_AAR_BASE)
- #define NRF_CCM ((NRF_CCM_Type*) NRF_CCM_BASE)
- #define NRF_WDT ((NRF_WDT_Type*) NRF_WDT_BASE)
- #define NRF_RTC1 ((NRF_RTC_Type*) NRF_RTC1_BASE)
- #define NRF_QDEC ((NRF_QDEC_Type*) NRF_QDEC_BASE)
- #define NRF_LPCOMP ((NRF_LPCOMP_Type*) NRF_LPCOMP_BASE)
- #define NRF_SWI ((NRF_SWI_Type*) NRF_SWI_BASE)
- #define NRF_NVMC ((NRF_NVMC_Type*) NRF_NVMC_BASE)
- #define NRF_PPI ((NRF_PPI_Type*) NRF_PPI_BASE)
- #define NRF_FICR ((NRF_FICR_Type*) NRF_FICR_BASE)
- #define NRF_UICR ((NRF_UICR_Type*) NRF_UICR_BASE)
- #define NRF_GPIO ((NRF_GPIO_Type*) NRF_GPIO_BASE)
-
- #if defined (__CC_ARM)
- #pragma pop
- #elif defined (__ICCARM__)
-
- #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #pragma clang diagnostic pop
- #elif defined (__GNUC__)
-
- #elif defined (__TMS470__)
-
- #elif defined (__TASKING__)
- #pragma warning restore
- #elif defined (__CSMC__)
-
- #endif
- #ifdef __cplusplus
- }
- #endif
- #endif
-
-
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