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- #ifndef _SSI_REGS_H_
- #define _SSI_REGS_H_
- #include "ssi_bitops.h"
- #define SASI_REG_OFFSET(unit_name, reg_name) \
- (DX_BASE_ ## unit_name + DX_ ## reg_name ## _REG_OFFSET)
- #define SASI_REG_BIT_SHIFT(reg_name, field_name) \
- (DX_ ## reg_name ## _ ## field_name ## _BIT_SHIFT)
- #if defined(DX_CC_REE) || defined(DX_CC_TEE) || defined(DX_CONFIG_IOT_SUPPORTED)
- #include "dx_reg_base_host.h"
- #define _SEP_HOST_GPR_REG_OFFSET(gpr_idx) \
- SASI_REG_OFFSET(HOST_RGF, HOST_SEP_HOST_GPR ## gpr_idx)
- #define SEP_HOST_GPR_REG_OFFSET(gpr_idx) _SEP_HOST_GPR_REG_OFFSET(gpr_idx)
- #define _HOST_SEP_GPR_REG_OFFSET(gpr_idx) \
- SASI_REG_OFFSET(HOST_RGF, HOST_HOST_SEP_GPR ## gpr_idx)
- #define HOST_SEP_GPR_REG_OFFSET(gpr_idx) _HOST_SEP_GPR_REG_OFFSET(gpr_idx)
- #define _SEP_HOST_GPR_IRQ_SHIFT(gpr_idx) \
- DX_HOST_IRR_SEP_HOST_GPR ## gpr_idx ## _INT_BIT_SHIFT
- #define SEP_HOST_GPR_IRQ_SHIFT(gpr_idx) \
- _SEP_HOST_GPR_IRQ_SHIFT(gpr_idx)
- #define SEP_HOST_GPR_IRQ_MASK(gpr_idx) \
- (1 << SEP_HOST_GPR_IRQ_CAUSE_SHIFT(gpr_idx))
- #define MODIFY_REGISTER_FLD(unitName, regName, fldName, fldVal) \
- do { \
- uint32_t regVal; \
- regVal = READ_REGISTER(SASI_REG_ADDR(unitName, regName)); \
- SASI_REG_FLD_SET(unitName, regName, fldName, regVal, fldVal); \
- WRITE_REGISTER(SASI_REG_ADDR(unitName, regName), regVal); \
- } while (0)
- #elif defined(DX_CC_SEP)
- #include "dx_reg_base_sep.h"
- #define SASI_REG_ADDR(unit_name, reg_name) \
- (DX_BASE_CC_PERIF + DX_BASE_ ## unit_name + \
- DX_ ## reg_name ## _REG_OFFSET)
- #define _SEP_HOST_GPR_REG_ADDR(gpr_idx) \
- SASI_REG_ADDR(SEP_RGF, SEP_SEP_HOST_GPR ## gpr_idx)
- #define SEP_HOST_GPR_REG_ADDR(gpr_idx) _SEP_HOST_GPR_REG_ADDR(gpr_idx)
- #define _HOST_SEP_GPR_REG_ADDR(gpr_idx) \
- SASI_REG_ADDR(SEP_RGF, SEP_HOST_SEP_GPR ## gpr_idx)
- #define HOST_SEP_GPR_REG_ADDR(gpr_idx) _HOST_SEP_GPR_REG_ADDR(gpr_idx)
- #else
- #error Execution domain is not DX_CC_SEP/DX_CC_REE/DX_CC_TEE/DX_CONFIG_IOT_SUPPORTED
- #endif
- #ifdef DX_BASE_ENV_REGS
- #ifndef DX_CC_SEP
- #define SASI_ENV_REG_OFFSET(reg_name) (DX_ENV_ ## reg_name ## _REG_OFFSET)
- #endif
- #endif
- #define SASI_REG_FLD_GET(unit_name, reg_name, fld_name, reg_val) \
- (DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ? \
- reg_val : \
- BITFIELD_GET(reg_val, DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
- DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
- #define SASI2_REG_FLD_GET(unit_name, reg_name, fld_name, reg_val) \
- (SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ? \
- reg_val : \
- BITFIELD_GET(reg_val, SASI_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
- SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
- #define SASI_REG_FLD_SET( \
- unit_name, reg_name, fld_name, reg_shadow_var, new_fld_val) \
- do { \
- if (DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20) \
- reg_shadow_var = new_fld_val; \
- else \
- BITFIELD_SET(reg_shadow_var, \
- DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
- DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE, \
- new_fld_val); \
- } while (0)
- #define SASI2_REG_FLD_SET( \
- unit_name, reg_name, fld_name, reg_shadow_var, new_fld_val) \
- do { \
- if (SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20) \
- reg_shadow_var = new_fld_val; \
- else \
- BITFIELD_SET(reg_shadow_var, \
- SASI_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
- SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE, \
- new_fld_val); \
- } while (0)
- #endif
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