integration_test_plat_defs.h 4.1 KB

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  1. /**************************************************************************************
  2. * Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
  3. * *
  4. * This file and the related binary are licensed under the following license: *
  5. * *
  6. * ARM Object Code and Header Files License, v1.0 Redistribution. *
  7. * *
  8. * Redistribution and use of object code, header files, and documentation, without *
  9. * modification, are permitted provided that the following conditions are met: *
  10. * *
  11. * 1) Redistributions must reproduce the above copyright notice and the *
  12. * following disclaimer in the documentation and/or other materials *
  13. * provided with the distribution. *
  14. * *
  15. * 2) Unless to the extent explicitly permitted by law, no reverse *
  16. * engineering, decompilation, or disassembly of is permitted. *
  17. * *
  18. * 3) Redistribution and use is permitted solely for the purpose of *
  19. * developing or executing applications that are targeted for use *
  20. * on an ARM-based product. *
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  22. * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
  23. * CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
  24. * NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
  25. * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
  26. * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
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  28. * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
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  31. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
  33. **************************************************************************************/
  34. #include <stdio.h>
  35. #include "SEGGER_RTT.h"
  36. #include "ssi_pal_types_plat.h"
  37. #if DX_LINUX_PLATFORM
  38. extern uint32_t g_free_mem_addr;
  39. extern uint32_t *g_test_stack_base_addr;
  40. extern uint32_t g_rom_base_addr;
  41. extern uint32_t g_env_rom_base_addr;
  42. #endif
  43. SaSiError_t mapEnvMemory(void);
  44. void unmapMemory(void);
  45. SaSiError_t integration_tests_setup(void);
  46. void integration_tests_clear(void);
  47. #define REG_BASE_ADR DX_BASE_CC
  48. #define REG_AREA_LEN 0x20000
  49. #define ENV_REG_BASE_ADR DX_BASE_ENV_REGS
  50. #define ENV_REG_AREA_LEN 0x20000
  51. #define SRAM_BASE_ADR 0
  52. #define TEST_DATA_START_ADDRESS sizeof(CRYS_RND_State_t)+sizeof(CRYS_RND_WorkBuff_t)
  53. /* Zynq EVBs have 1GB and we reserve the memory at offset 768M */
  54. #define FREE_MEM_BASE_ADR 0x20020000
  55. #define CONTIG_FREE_MEM 0x8000
  56. /* Free memory is dedicated for SW image storage */
  57. #define BOOT_FREE_MEM_BASE_ADR FREE_MEM_BASE_ADR
  58. #define BOOT_FREE_MEM_LEN 0x500000
  59. /* user space follows the free memory, and uses for stack and workspace memory */
  60. #define PTHREAD_STACK_BASE_ADR (FREE_MEM_BASE_ADR + CONTIG_FREE_MEM)
  61. #define PTHREAD_STACK_SIZE 16*1024
  62. #define WORKSPACE_BASE_ADDR (PTHREAD_STACK_BASE_ADR + PTHREAD_STACK_SIZE)
  63. #define INTEG_TEST_PRINT(...) SEGGER_RTT_printf(0, __VA_ARGS__)