port_cmsis.c 13 KB

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  1. /*
  2. * FreeRTOS Kernel V10.0.0
  3. * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  6. * this software and associated documentation files (the "Software"), to deal in
  7. * the Software without restriction, including without limitation the rights to
  8. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  9. * the Software, and to permit persons to whom the Software is furnished to do so,
  10. * subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in all
  13. * copies or substantial portions of the Software. If you wish to use our Amazon
  14. * FreeRTOS name, please do so in a fair use way that does not cause confusion.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  18. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  19. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  20. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  22. *
  23. * http://www.FreeRTOS.org
  24. * http://aws.amazon.com/freertos
  25. *
  26. * 1 tab == 4 spaces!
  27. */
  28. /*-----------------------------------------------------------
  29. * Implementation of functions defined in portable.h for the ARM CM4F port.
  30. *----------------------------------------------------------*/
  31. /* Scheduler includes. */
  32. #include "FreeRTOS.h"
  33. #include "task.h"
  34. #ifdef SOFTDEVICE_PRESENT
  35. #include "nrf_soc.h"
  36. #include "app_util.h"
  37. #include "app_util_platform.h"
  38. #endif
  39. #if !(__FPU_USED) && !(__LINT__)
  40. #error This port can only be used when the project options are configured to enable hardware floating point support.
  41. #endif
  42. #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
  43. #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
  44. #endif
  45. /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
  46. r0p1 port. */
  47. #define portCORTEX_M4_r0p1_ID ( 0x410FC241UL )
  48. /* Constants required to check the validity of an interrupt priority. */
  49. #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
  50. #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
  51. #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
  52. /* Constants required to set up the initial stack. */
  53. #define portINITIAL_XPSR (((xPSR_Type){.b.T = 1}).w)
  54. #define portINITIAL_EXEC_RETURN ( 0xfffffffd )
  55. /* Let the user override the pre-loading of the initial LR with the address of
  56. prvTaskExitError() in case is messes up unwinding of the stack in the
  57. debugger. */
  58. #ifdef configTASK_RETURN_ADDRESS
  59. #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
  60. #else
  61. #define portTASK_RETURN_ADDRESS prvTaskExitError
  62. #endif
  63. /* Each task maintains its own interrupt status in the critical nesting
  64. variable. */
  65. static UBaseType_t uxCriticalNesting = 0;
  66. /*
  67. * Setup the timer to generate the tick interrupts. The implementation in this
  68. * file is weak to allow application writers to change the timer used to
  69. * generate the tick interrupt.
  70. */
  71. extern void vPortSetupTimerInterrupt( void );
  72. /*
  73. * Exception handlers.
  74. */
  75. void xPortSysTickHandler( void );
  76. /*
  77. * Start first task is a separate function so it can be tested in isolation.
  78. */
  79. extern void vPortStartFirstTask( void );
  80. /*
  81. * Function to enable the VFP.
  82. */
  83. static void vPortEnableVFP( void );
  84. /*
  85. * Used to catch tasks that attempt to return from their implementing function.
  86. */
  87. static void prvTaskExitError( void );
  88. /*-----------------------------------------------------------*/
  89. /*
  90. * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
  91. * FreeRTOS API functions are not called from interrupts that have been assigned
  92. * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
  93. */
  94. #if ( configASSERT_DEFINED == 1 )
  95. static uint8_t ucMaxSysCallPriority = 0;
  96. static uint32_t ulMaxPRIGROUPValue = 0;
  97. #endif /* configASSERT_DEFINED */
  98. /*-----------------------------------------------------------*/
  99. /*
  100. * See header file for description.
  101. */
  102. StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
  103. {
  104. /* Simulate the stack frame as it would be created by a context switch
  105. interrupt. */
  106. /* Offset added to account for the way the MCU uses the stack on entry/exit
  107. of interrupts, and to ensure alignment. */
  108. pxTopOfStack--;
  109. *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
  110. pxTopOfStack--;
  111. *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
  112. pxTopOfStack--;
  113. *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
  114. /* Save code space by skipping register initialisation. */
  115. pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
  116. *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
  117. /* A save method is being used that requires each task to maintain its
  118. own exec return value. */
  119. pxTopOfStack--;
  120. *pxTopOfStack = portINITIAL_EXEC_RETURN;
  121. pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
  122. return pxTopOfStack;
  123. }
  124. /*-----------------------------------------------------------*/
  125. static void prvTaskExitError( void )
  126. {
  127. /* A function that implements a task must not exit or attempt to return to
  128. its caller as there is nothing to return to. If a task wants to exit it
  129. should instead call vTaskDelete( NULL ).
  130. Artificially force an assert() to be triggered if configASSERT() is
  131. defined, then stop here so application writers can catch the error. */
  132. configASSERT( uxCriticalNesting == ~0UL );
  133. portDISABLE_INTERRUPTS();
  134. for ( ;; );
  135. }
  136. /*-----------------------------------------------------------*/
  137. /*
  138. * See header file for description.
  139. */
  140. BaseType_t xPortStartScheduler( void )
  141. {
  142. /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
  143. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
  144. configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
  145. /* This port is designed for nRF52, this is Cortex-M4 r0p1. */
  146. configASSERT( SCB->CPUID == portCORTEX_M4_r0p1_ID );
  147. #if ( configASSERT_DEFINED == 1 )
  148. {
  149. volatile uint32_t ulOriginalPriority;
  150. volatile uint8_t * const pucFirstUserPriorityRegister = &NVIC->IP[0];
  151. volatile uint8_t ucMaxPriorityValue;
  152. /* Determine the maximum priority from which ISR safe FreeRTOS API
  153. functions can be called. ISR safe functions are those that end in
  154. "FromISR". FreeRTOS maintains separate thread and ISR API functions to
  155. ensure interrupt entry is as fast and simple as possible.
  156. Save the interrupt priority value that is about to be clobbered. */
  157. ulOriginalPriority = *pucFirstUserPriorityRegister;
  158. /* Determine the number of priority bits available. First write to all
  159. possible bits. */
  160. *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
  161. /* Read the value back to see how many bits stuck. */
  162. ucMaxPriorityValue = *pucFirstUserPriorityRegister;
  163. /* Use the same mask on the maximum system call priority. */
  164. ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
  165. /* Calculate the maximum acceptable priority group value for the number
  166. of bits read back. */
  167. ulMaxPRIGROUPValue = SCB_AIRCR_PRIGROUP_Msk >> SCB_AIRCR_PRIGROUP_Pos;
  168. while ( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
  169. {
  170. ulMaxPRIGROUPValue--;
  171. ucMaxPriorityValue <<= ( uint8_t ) 0x01;
  172. }
  173. /* Remove any bits that are more than actually existing. */
  174. ulMaxPRIGROUPValue &= SCB_AIRCR_PRIGROUP_Msk >> SCB_AIRCR_PRIGROUP_Pos;
  175. /* Restore the clobbered interrupt priority register to its original
  176. value. */
  177. *pucFirstUserPriorityRegister = ulOriginalPriority;
  178. }
  179. #endif /* conifgASSERT_DEFINED */
  180. /* Make PendSV the lowest priority interrupts. */
  181. NVIC_SetPriority(PendSV_IRQn, configKERNEL_INTERRUPT_PRIORITY);
  182. /* Start the timer that generates the tick ISR. Interrupts are disabled
  183. here already. */
  184. vPortSetupTimerInterrupt();
  185. /* Initialise the critical nesting count ready for the first task. */
  186. uxCriticalNesting = 0;
  187. /* Ensure the VFP is enabled - it should be anyway. */
  188. vPortEnableVFP();
  189. /* Lazy save always. */
  190. FPU->FPCCR |= FPU_FPCCR_ASPEN_Msk | FPU_FPCCR_LSPEN_Msk;
  191. /* Finally this port requires SEVONPEND to be active */
  192. SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
  193. /* Start the first task. */
  194. vPortStartFirstTask();
  195. /* Should never get here as the tasks will now be executing! Call the task
  196. exit error function to prevent compiler warnings about a static function
  197. not being called in the case that the application writer overrides this
  198. functionality by defining configTASK_RETURN_ADDRESS. */
  199. prvTaskExitError();
  200. /* Should not get here! */
  201. return 0;
  202. }
  203. /*-----------------------------------------------------------*/
  204. void vPortEndScheduler( void )
  205. {
  206. /* Not implemented in ports where there is nothing to return to.
  207. Artificially force an assert. */
  208. configASSERT( uxCriticalNesting == 1000UL );
  209. }
  210. /*-----------------------------------------------------------*/
  211. void vPortEnterCritical( void )
  212. {
  213. portDISABLE_INTERRUPTS();
  214. uxCriticalNesting++;
  215. /* This is not the interrupt safe version of the enter critical function so
  216. assert() if it is being called from an interrupt context. Only API
  217. functions that end in "FromISR" can be used in an interrupt. Only assert if
  218. the critical nesting count is 1 to protect against recursive calls if the
  219. assert function also uses a critical section. */
  220. if ( uxCriticalNesting == 1 )
  221. {
  222. configASSERT( ( SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk ) == 0 );
  223. }
  224. }
  225. /*-----------------------------------------------------------*/
  226. void vPortExitCritical( void )
  227. {
  228. configASSERT( uxCriticalNesting );
  229. uxCriticalNesting--;
  230. if ( uxCriticalNesting == 0 )
  231. {
  232. portENABLE_INTERRUPTS();
  233. }
  234. }
  235. /*-----------------------------------------------------------*/
  236. /* This is a naked function. */
  237. static void vPortEnableVFP( void )
  238. {
  239. SCB->CPACR |= 0xf << 20;
  240. }
  241. /*-----------------------------------------------------------*/
  242. #if ( configASSERT_DEFINED == 1 )
  243. void vPortValidateInterruptPriority( void )
  244. {
  245. uint32_t ulCurrentInterrupt;
  246. uint8_t ucCurrentPriority;
  247. IPSR_Type ipsr;
  248. /* Obtain the number of the currently executing interrupt. */
  249. ipsr.w = __get_IPSR();
  250. ulCurrentInterrupt = ipsr.b.ISR;
  251. /* Is the interrupt number a user defined interrupt? */
  252. if ( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
  253. {
  254. /* Look up the interrupt's priority. */
  255. ucCurrentPriority = NVIC->IP[ ulCurrentInterrupt - portFIRST_USER_INTERRUPT_NUMBER ];
  256. /* The following assertion will fail if a service routine (ISR) for
  257. an interrupt that has been assigned a priority above
  258. configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
  259. function. ISR safe FreeRTOS API functions must *only* be called
  260. from interrupts that have been assigned a priority at or below
  261. configMAX_SYSCALL_INTERRUPT_PRIORITY.
  262. Numerically low interrupt priority numbers represent logically high
  263. interrupt priorities, therefore the priority of the interrupt must
  264. be set to a value equal to or numerically *higher* than
  265. configMAX_SYSCALL_INTERRUPT_PRIORITY.
  266. Interrupts that use the FreeRTOS API must not be left at their
  267. default priority of zero as that is the highest possible priority,
  268. which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
  269. and therefore also guaranteed to be invalid.
  270. FreeRTOS maintains separate thread and ISR API functions to ensure
  271. interrupt entry is as fast and simple as possible.
  272. The following links provide detailed information:
  273. http://www.freertos.org/RTOS-Cortex-M3-M4.html
  274. http://www.freertos.org/FAQHelp.html */
  275. configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
  276. }
  277. /* Priority grouping: The interrupt controller (NVIC) allows the bits
  278. that define each interrupt's priority to be split between bits that
  279. define the interrupt's pre-emption priority bits and bits that define
  280. the interrupt's sub-priority. For simplicity all bits must be defined
  281. to be pre-emption priority bits. The following assertion will fail if
  282. this is not the case (if some bits represent a sub-priority).
  283. If the application only uses CMSIS libraries for interrupt
  284. configuration then the correct setting can be achieved on all Cortex-M
  285. devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
  286. scheduler. Note however that some vendor specific peripheral libraries
  287. assume a non-zero priority group setting, in which cases using a value
  288. of zero will result in unpredicable behaviour. */
  289. configASSERT( NVIC_GetPriorityGrouping() <= ulMaxPRIGROUPValue );
  290. }
  291. #endif /* configASSERT_DEFINED */